Files
llvm-project/llvm/utils/TableGen/X86RecognizableInstr.cpp
Sean Callanan c3fd523731 X86 table-generator and disassembler support for the AVX
instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.

llvm-svn: 127644
2011-03-15 01:23:15 +00:00

37 KiB