2ed751bd47
are defined as enumerations. Current bits include:
eEmulateInstructionOptionAutoAdvancePC
eEmulateInstructionOptionIgnoreConditions
Modified the EmulateInstruction class to have a few more pure virtuals that
can help clients understand how many instructions the emulator can handle:
virtual bool
SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0;
Where instruction types are defined as:
//------------------------------------------------------------------
/// Instruction types
//------------------------------------------------------------------
typedef enum InstructionType
{
eInstructionTypeAny, // Support for any instructions at all (at least one)
eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp
eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer
eInstructionTypeAll // All instructions of any kind
} InstructionType;
This allows use to tell what an emulator can do and also allows us to request
these abilities when we are finding the plug-in interface.
Added the ability for an EmulateInstruction class to get the register names
for any registers that are part of the emulation. This helps with being able
to dump and log effectively.
The UnwindAssembly class now stores the architecture it was created with in
case it is needed later in the unwinding process.
Added a function that can tell us DWARF register names for ARM that goes
along with the source/Utility/ARM_DWARF_Registers.h file:
source/Utility/ARM_DWARF_Registers.c
Took some of plug-ins out of the lldb_private namespace.
llvm-svn: 130189
447 lines
12 KiB
C++
447 lines
12 KiB
C++
//===-- EmulationStateARM.cpp -----------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "EmulationStateARM.h"
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#include "lldb/Core/Scalar.h"
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#include "lldb/Target/StackFrame.h"
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#include "lldb/Target/RegisterContext.h"
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#include "Utility/ARM_DWARF_Registers.h"
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using namespace lldb;
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using namespace lldb_private;
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EmulationStateARM::EmulationStateARM () :
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m_gpr (),
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m_vfp_regs (),
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m_memory ()
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{
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ClearPseudoRegisters();
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}
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EmulationStateARM::~EmulationStateARM ()
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{
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}
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bool
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EmulationStateARM::LoadPseudoRegistersFromFrame (StackFrame &frame)
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{
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RegisterContext *reg_context = frame.GetRegisterContext().get();
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Scalar value;
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uint64_t reg_value64;
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uint32_t reg_value32;
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bool success = true;
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for (int i = dwarf_r0; i < dwarf_r0 + 17; ++i)
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{
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uint32_t internal_reg_num = reg_context->ConvertRegisterKindToRegisterNumber (eRegisterKindDWARF, i);
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if (reg_context->ReadRegisterValue (internal_reg_num, value))
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{
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reg_value32 = (uint32_t) value.GetRawBits64 (0);
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m_gpr[i - dwarf_r0] = reg_value32;
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}
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else
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success = false;
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}
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for (int i = dwarf_s0; i < dwarf_s0 + 32; ++i)
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{
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uint32_t internal_reg_num = reg_context->ConvertRegisterKindToRegisterNumber (eRegisterKindDWARF, i);
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if (reg_context->ReadRegisterValue (internal_reg_num, value))
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{
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uint32_t idx = i - dwarf_s0;
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reg_value32 = (uint32_t) value.GetRawBits64 (0);
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m_vfp_regs.sd_regs[idx / 2].s_reg[idx % 2] = reg_value32;
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}
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else
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success = false;
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}
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for (int i = dwarf_d0; i < dwarf_d0 + 32; ++i)
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{
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uint32_t internal_reg_num = reg_context->ConvertRegisterKindToRegisterNumber (eRegisterKindDWARF, i);
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if (reg_context->ReadRegisterValue (internal_reg_num, value))
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{
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uint32_t idx = i - dwarf_d0;
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reg_value64 = value.GetRawBits64 (0);
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if (i < 16)
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m_vfp_regs.sd_regs[idx].d_reg = reg_value64;
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else
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m_vfp_regs.d_regs[idx - 16] = reg_value64;
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}
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else
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success = false;
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}
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return success;
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}
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bool
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EmulationStateARM::StorePseudoRegisterValue (uint32_t reg_num, uint64_t value)
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{
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if ((dwarf_r0 <= reg_num) && (reg_num <= dwarf_cpsr))
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m_gpr[reg_num - dwarf_r0] = (uint32_t) value;
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else if ((dwarf_s0 <= reg_num) && (reg_num <= dwarf_s31))
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{
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uint32_t idx = reg_num - dwarf_s0;
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m_vfp_regs.sd_regs[idx / 2].s_reg[idx % 2] = (uint32_t) value;
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}
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else if ((dwarf_d0 <= reg_num) && (reg_num <= dwarf_d31))
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{
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if ((reg_num - dwarf_d0) < 16)
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{
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m_vfp_regs.sd_regs[reg_num - dwarf_d0].d_reg = value;
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}
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else
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m_vfp_regs.d_regs[reg_num - dwarf_d16] = value;
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}
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else
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return false;
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return true;
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}
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uint64_t
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EmulationStateARM::ReadPseudoRegisterValue (uint32_t reg_num, bool &success)
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{
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uint64_t value = 0;
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success = true;
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if ((dwarf_r0 <= reg_num) && (reg_num <= dwarf_cpsr))
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value = m_gpr[reg_num - dwarf_r0];
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else if ((dwarf_s0 <= reg_num) && (reg_num <= dwarf_s31))
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{
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uint32_t idx = reg_num - dwarf_s0;
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value = m_vfp_regs.sd_regs[idx / 2].s_reg[idx % 2];
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}
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else if ((dwarf_d0 <= reg_num) && (reg_num <= dwarf_d31))
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{
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if ((reg_num - dwarf_d0) < 16)
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value = m_vfp_regs.sd_regs[reg_num - dwarf_d0].d_reg;
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else
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value = m_vfp_regs.d_regs[reg_num - dwarf_d16];
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}
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else
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success = false;
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return value;
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}
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void
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EmulationStateARM::ClearPseudoRegisters ()
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{
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for (int i = 0; i < 17; ++i)
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m_gpr[i] = 0;
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for (int i = 0; i < 16; ++i)
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m_vfp_regs.sd_regs[i].d_reg = 0;
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for (int i = 0; i < 16; ++i)
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m_vfp_regs.d_regs[i] = 0;
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}
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void
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EmulationStateARM::ClearPseudoMemory ()
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{
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m_memory.clear();
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}
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bool
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EmulationStateARM::StoreToPseudoAddress (lldb::addr_t p_address, uint64_t value, uint32_t size)
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{
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if (size > 8)
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return false;
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if (size <= 4)
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m_memory[p_address] = value;
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else if (size == 8)
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{
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m_memory[p_address] = (value << 32) >> 32;
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m_memory[p_address + 4] = value << 32;
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}
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return true;
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}
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uint32_t
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EmulationStateARM::ReadFromPseudoAddress (lldb::addr_t p_address, uint32_t size, bool &success)
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{
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std::map<lldb::addr_t,uint32_t>::iterator pos;
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uint32_t ret_val = 0;
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success = true;
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pos = m_memory.find(p_address);
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if (pos != m_memory.end())
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ret_val = pos->second;
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else
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success = false;
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return ret_val;
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}
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size_t
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EmulationStateARM::ReadPseudoMemory (EmulateInstruction *instruction,
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void *baton,
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const EmulateInstruction::Context &context,
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lldb::addr_t addr,
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void *dst,
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size_t length)
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{
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if (!baton)
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return 0;
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bool success = true;
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EmulationStateARM *pseudo_state = (EmulationStateARM *) baton;
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if (length <= 4)
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{
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uint32_t value = pseudo_state->ReadFromPseudoAddress (addr, length, success);
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if (!success)
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return 0;
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*((uint32_t *) dst) = value;
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}
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else if (length == 8)
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{
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uint32_t value1 = pseudo_state->ReadFromPseudoAddress (addr, 4, success);
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if (!success)
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return 0;
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uint32_t value2 = pseudo_state->ReadFromPseudoAddress (addr + 4, 4, success);
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if (!success)
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return 0;
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uint64_t value64 = value2;
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value64 = (value64 << 32) | value1;
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*((uint64_t *) dst) = value64;
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}
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else
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success = false;
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if (success)
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return length;
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return 0;
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}
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size_t
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EmulationStateARM::WritePseudoMemory (EmulateInstruction *instruction,
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void *baton,
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const EmulateInstruction::Context &context,
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lldb::addr_t addr,
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const void *dst,
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size_t length)
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{
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if (!baton)
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return 0;
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bool success;
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EmulationStateARM *pseudo_state = (EmulationStateARM *) baton;
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uint64_t value = *((uint64_t *) dst);
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success = pseudo_state->StoreToPseudoAddress (addr, value, length);
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if (success)
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return length;
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return 0;
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}
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bool
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EmulationStateARM::ReadPseudoRegister (EmulateInstruction *instruction,
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void *baton,
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uint32_t reg_kind,
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uint32_t reg_num,
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uint64_t ®_value)
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{
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if (!baton)
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return false;
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bool success = true;
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EmulationStateARM *pseudo_state = (EmulationStateARM *) baton;
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if (reg_kind == eRegisterKindGeneric)
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{
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switch (reg_num)
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{
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case LLDB_REGNUM_GENERIC_PC:
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reg_num = dwarf_pc; break;
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case LLDB_REGNUM_GENERIC_SP:
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reg_num = dwarf_sp; break;
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case LLDB_REGNUM_GENERIC_FLAGS:
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reg_num = dwarf_cpsr; break;
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case LLDB_REGNUM_GENERIC_RA:
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reg_num = dwarf_lr; break;
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default:
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break;
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}
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}
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reg_value = pseudo_state->ReadPseudoRegisterValue (reg_num, success);
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return success;
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}
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bool
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EmulationStateARM::WritePseudoRegister (EmulateInstruction *instruction,
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void *baton,
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const EmulateInstruction::Context &context,
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uint32_t reg_kind,
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uint32_t reg_num,
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uint64_t reg_value)
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{
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if (!baton)
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return false;
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if (reg_kind == eRegisterKindGeneric)
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{
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switch (reg_num)
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{
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case LLDB_REGNUM_GENERIC_PC:
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reg_num = dwarf_pc; break;
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case LLDB_REGNUM_GENERIC_SP:
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reg_num = dwarf_sp; break;
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case LLDB_REGNUM_GENERIC_FLAGS:
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reg_num = dwarf_cpsr; break;
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case LLDB_REGNUM_GENERIC_RA:
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reg_num = dwarf_lr; break;
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default:
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break;
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}
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}
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EmulationStateARM *pseudo_state = (EmulationStateARM *) baton;
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return pseudo_state->StorePseudoRegisterValue (reg_num, reg_value);
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}
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bool
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EmulationStateARM::CompareState (EmulationStateARM &other_state)
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{
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bool match = true;
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for (int i = 0; match && i < 17; ++i)
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{
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if (m_gpr[i] != other_state.m_gpr[i])
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match = false;
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}
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for (int i = 0; match && i < 16; ++i)
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{
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if (m_vfp_regs.sd_regs[i].s_reg[0] != other_state.m_vfp_regs.sd_regs[i].s_reg[0])
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match = false;
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if (m_vfp_regs.sd_regs[i].s_reg[1] != other_state.m_vfp_regs.sd_regs[i].s_reg[1])
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match = false;
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}
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for (int i = 0; match && i < 32; ++i)
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{
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if (i < 16)
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{
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if (m_vfp_regs.sd_regs[i].d_reg != other_state.m_vfp_regs.sd_regs[i].d_reg)
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match = false;
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}
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else
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{
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if (m_vfp_regs.d_regs[i - 16] != other_state.m_vfp_regs.d_regs[i - 16])
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match = false;
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}
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}
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return match;
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}
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bool
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EmulationStateARM::LoadStateFromDictionary (OptionValueDictionary *test_data)
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{
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static ConstString memory_key ("memory");
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static ConstString registers_key ("registers");
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if (!test_data)
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return false;
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OptionValueSP value_sp = test_data->GetValueForKey (memory_key);
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// Load memory, if present.
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if (value_sp.get() != NULL)
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{
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static ConstString address_key ("address");
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static ConstString data_key ("data");
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uint64_t start_address = 0;
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OptionValueDictionary *mem_dict = value_sp->GetAsDictionaryValue();
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value_sp = mem_dict->GetValueForKey (address_key);
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if (value_sp.get() == NULL)
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return false;
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else
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start_address = value_sp->GetUInt64Value ();
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value_sp = mem_dict->GetValueForKey (data_key);
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OptionValueArray *mem_array = value_sp->GetAsArrayValue();
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if (!mem_array)
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return false;
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uint32_t num_elts = mem_array->GetSize();
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uint32_t address = (uint32_t) start_address;
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for (int i = 0; i < num_elts; ++i)
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{
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value_sp = mem_array->GetValueAtIndex (i);
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if (value_sp.get() == NULL)
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return false;
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uint64_t value = value_sp->GetUInt64Value();
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StoreToPseudoAddress (address, value, 4);
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address = address + 4;
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}
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}
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value_sp = test_data->GetValueForKey (registers_key);
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if (value_sp.get() == NULL)
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return false;
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// Load General Registers
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OptionValueDictionary *reg_dict = value_sp->GetAsDictionaryValue ();
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StreamString sstr;
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for (int i = 0; i < 16; ++i)
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{
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sstr.Clear();
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sstr.Printf ("r%d", i);
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ConstString reg_name (sstr.GetData());
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value_sp = reg_dict->GetValueForKey (reg_name);
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if (value_sp.get() == NULL)
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return false;
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uint64_t reg_value = value_sp->GetUInt64Value();
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StorePseudoRegisterValue (dwarf_r0 + i, reg_value);
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}
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static ConstString cpsr_name ("cpsr");
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value_sp = reg_dict->GetValueForKey (cpsr_name);
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if (value_sp.get() == NULL)
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return false;
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StorePseudoRegisterValue (dwarf_cpsr, value_sp->GetUInt64Value());
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// Load s/d Registers
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for (int i = 0; i < 32; ++i)
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{
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sstr.Clear();
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sstr.Printf ("s%d", i);
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ConstString reg_name (sstr.GetData());
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value_sp = reg_dict->GetValueForKey (reg_name);
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if (value_sp.get() == NULL)
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return false;
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uint64_t reg_value = value_sp->GetUInt64Value();
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StorePseudoRegisterValue (dwarf_s0 + i, reg_value);
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}
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return true;
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}
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