168d14b143
For this example:
float test (int *arr) {
return arr[2];
}
We currently generate the following code:
li r4, 8
lxsiwax f0, r3, r4
xscvsxdsp f1, f0
With this patch, we will now generate:
addi r3, r3, 8
lxsiwax f0, 0, r3
xscvsxdsp f1, f0
Originally reported in: https://bugs.llvm.org/show_bug.cgi?id=27204
Differential Revision: https://reviews.llvm.org/D35027
llvm-svn: 307553
38 lines
1.3 KiB
LLVM
38 lines
1.3 KiB
LLVM
; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown -verify-machineinstrs < %s | FileCheck %s
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; Function Attrs: norecurse nounwind readonly
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define float @testSingleAccess(i32* nocapture readonly %arr) local_unnamed_addr #0 {
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; CHECK-LABEL: testSingleAccess:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: addi 3, 3, 8
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; CHECK-NEXT: lxsiwax 0, 0, 3
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; CHECK-NEXT: xscvsxdsp 1, 0
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; CHECK-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %arr, i64 2
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%0 = load i32, i32* %arrayidx, align 4
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%conv = sitofp i32 %0 to float
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ret float %conv
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}
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; Function Attrs: norecurse nounwind readonly
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define float @testMultipleAccess(i32* nocapture readonly %arr) local_unnamed_addr #0 {
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; CHECK-LABEL: testMultipleAccess:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: lwz 4, 8(3)
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; CHECK-NEXT: lwz 12, 12(3)
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; CHECK-NEXT: add 3, 12, 4
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; CHECK-NEXT: mtvsrwa 0, 3
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; CHECK-NEXT: xscvsxdsp 1, 0
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; CHECK-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %arr, i64 2
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 3
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%1 = load i32, i32* %arrayidx1, align 4
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%add = add nsw i32 %1, %0
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%conv = sitofp i32 %add to float
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ret float %conv
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}
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