Zlatko Buljan 72a7f9c1f5 [mips][microMIPS] Implement EXTP, EXTPDP, EXTPDPV, EXTPV, EXTR[_RS].W, EXTR_S.H, EXTRV[_RS].W and EXTRV_S.H instructions ...

Differential Revision: http://reviews.llvm.org/D14174

llvm-svn: 253332

2015-11-17 12:54:15 +00:00

..

AArch64

[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for

2015-10-05 13:42:31 +00:00

ARM

[ARM] Allow SP in rGPR, starting from ARMv8

2015-10-28 13:58:36 +00:00

Hexagon

[Hexagon] Fixing store instructions and reenabling a few more tests.

2015-11-10 00:22:00 +00:00

Mips

[mips][microMIPS] Implement EXTP, EXTPDP, EXTPDPV, EXTPV, EXTR[_RS].W, EXTR_S.H, EXTRV[_RS].W and EXTRV_S.H instructions

2015-11-17 12:54:15 +00:00

PowerPC

[PowerPC] Replace cntlz[.] with cntlzw[.]

2015-10-28 03:26:45 +00:00

Sparc

[Sparc] Implement i64 load/store support for 32-bit sparc.

2015-08-10 19:11:39 +00:00

SystemZ

[SystemZ] Add assembly instructions for obtaining clock values as well as CPU features

2015-10-01 14:43:48 +00:00

X86

[llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly

2015-08-26 16:20:29 +00:00

XCore

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