2341c22ec7
This feature is needed in order to support shifts of more than 255 bits on large integer types. This changes the syntax for llvm assembly to make shl, ashr and lshr instructions look like a binary operator: shl i32 %X, 1 instead of shl i32 %X, i8 1 Additionally, this should help a few passes perform additional optimizations. llvm-svn: 33776
32 lines
751 B
LLVM
32 lines
751 B
LLVM
; RUN: llvm-as < %s | llc -march=arm &&
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; RUN: llvm-as < %s | llc -march=arm | grep rrx | wc -l | grep 1 &&
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; RUN: llvm-as < %s | llc -march=arm | grep __ashldi3 &&
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; RUN: llvm-as < %s | llc -march=arm | grep __ashrdi3 &&
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; RUN: llvm-as < %s | llc -march=arm | grep __lshrdi3 &&
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; RUN: llvm-as < %s | llc -march=arm -enable-thumb
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define i64 @f0(i64 %A, i64 %B) {
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%tmp = bitcast i64 %A to i64
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%tmp2 = lshr i64 %B, 1
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%tmp3 = sub i64 %tmp, %tmp2
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ret i64 %tmp3
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}
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define i32 @f1(i64 %x, i64 %y) {
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%a = shl i64 %x, %y
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%b = trunc i64 %a to i32
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ret i32 %b
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}
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define i32 @f2(i64 %x, i64 %y) {
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%a = ashr i64 %x, %y
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%b = trunc i64 %a to i32
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ret i32 %b
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}
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define i32 @f3(i64 %x, i64 %y) {
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%a = lshr i64 %x, %y
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%b = trunc i64 %a to i32
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ret i32 %b
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}
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