------------------------------------------------------------------------ r321771 | vedantk | 2018-01-03 15:11:32 -0800 (Wed, 03 Jan 2018) | 21 lines [CGBuiltin] Handle unsigned mul overflow properly (PR35750) r320902 fixed the IRGen for some types of checked multiplications. It did not handle unsigned overflow correctly in the case where the signed operand is negative (PR35750). Eli pointed out that on overflow, the result must be equal to the unique value that is equivalent to the mathematically-correct result modulo two raised to the k power, where k is the number of bits in the result type. This patch fixes the specialized IRGen from r320902 accordingly. Testing: Apart from check-clang, I modified the test harness from r320902 to validate the results of all multiplications -- not just the ones which don't overflow: https://gist.github.com/vedantk/3eb9c88f82e5c32f2e590555b4af5081 llvm.org/PR35750, rdar://34963321 Differential Revision: https://reviews.llvm.org/D41717 ------------------------------------------------------------------------ llvm-svn: 322555
464 lines
17 KiB
C
464 lines
17 KiB
C
// Test CodeGen for Security Check Overflow Builtins.
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// rdar://13421498
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// RUN: %clang_cc1 -triple "i686-unknown-unknown" -emit-llvm -x c %s -o - | FileCheck %s
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// RUN: %clang_cc1 -triple "x86_64-unknown-unknown" -emit-llvm -x c %s -o - | FileCheck %s
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// RUN: %clang_cc1 -triple "x86_64-mingw32" -emit-llvm -x c %s -o - | FileCheck %s
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extern unsigned UnsignedErrorCode;
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extern unsigned long UnsignedLongErrorCode;
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extern unsigned long long UnsignedLongLongErrorCode;
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extern int IntErrorCode;
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extern long LongErrorCode;
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extern long long LongLongErrorCode;
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void overflowed(void);
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unsigned test_add_overflow_uint_uint_uint(unsigned x, unsigned y) {
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// CHECK-LABEL: define i32 @test_add_overflow_uint_uint_uint
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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unsigned r;
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if (__builtin_add_overflow(x, y, &r))
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overflowed();
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return r;
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}
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int test_add_overflow_int_int_int(int x, int y) {
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// CHECK-LABEL: define i32 @test_add_overflow_int_int_int
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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int r;
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if (__builtin_add_overflow(x, y, &r))
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overflowed();
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return r;
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}
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unsigned test_sub_overflow_uint_uint_uint(unsigned x, unsigned y) {
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// CHECK-LABEL: define i32 @test_sub_overflow_uint_uint_uint
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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unsigned r;
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if (__builtin_sub_overflow(x, y, &r))
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overflowed();
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return r;
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}
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int test_sub_overflow_int_int_int(int x, int y) {
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// CHECK-LABEL: define i32 @test_sub_overflow_int_int_int
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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int r;
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if (__builtin_sub_overflow(x, y, &r))
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overflowed();
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return r;
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}
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unsigned test_mul_overflow_uint_uint_uint(unsigned x, unsigned y) {
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// CHECK-LABEL: define i32 @test_mul_overflow_uint_uint_uint
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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unsigned r;
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if (__builtin_mul_overflow(x, y, &r))
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overflowed();
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return r;
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}
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int test_mul_overflow_int_int_int(int x, int y) {
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// CHECK-LABEL: define i32 @test_mul_overflow_int_int_int
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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int r;
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if (__builtin_mul_overflow(x, y, &r))
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overflowed();
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return r;
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}
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int test_add_overflow_uint_int_int(unsigned x, int y) {
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// CHECK-LABEL: define i32 @test_add_overflow_uint_int_int
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// CHECK: [[XE:%.+]] = zext i32 %{{.+}} to i33
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// CHECK: [[YE:%.+]] = sext i32 %{{.+}} to i33
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// CHECK: [[S:%.+]] = call { i33, i1 } @llvm.sadd.with.overflow.i33(i33 [[XE]], i33 [[YE]])
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i33, i1 } [[S]], 0
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// CHECK-DAG: [[C1:%.+]] = extractvalue { i33, i1 } [[S]], 1
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// CHECK: [[QT:%.+]] = trunc i33 [[Q]] to i32
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// CHECK: [[QTE:%.+]] = sext i32 [[QT]] to i33
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// CHECK: [[C2:%.+]] = icmp ne i33 [[Q]], [[QTE]]
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// CHECK: [[C3:%.+]] = or i1 [[C1]], [[C2]]
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// CHECK: store i32 [[QT]], i32*
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// CHECK: br i1 [[C3]]
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int r;
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if (__builtin_add_overflow(x, y, &r))
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overflowed();
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return r;
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}
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_Bool test_add_overflow_uint_uint_bool(unsigned x, unsigned y) {
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// CHECK-LABEL: define {{.*}} i1 @test_add_overflow_uint_uint_bool
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// CHECK-NOT: ext
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK-DAG: [[C1:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK: [[QT:%.+]] = trunc i32 [[Q]] to i1
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// CHECK: [[QTE:%.+]] = zext i1 [[QT]] to i32
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// CHECK: [[C2:%.+]] = icmp ne i32 [[Q]], [[QTE]]
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// CHECK: [[C3:%.+]] = or i1 [[C1]], [[C2]]
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// CHECK: [[QT2:%.+]] = zext i1 [[QT]] to i8
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// CHECK: store i8 [[QT2]], i8*
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// CHECK: br i1 [[C3]]
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_Bool r;
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if (__builtin_add_overflow(x, y, &r))
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overflowed();
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return r;
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}
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unsigned test_add_overflow_bool_bool_uint(_Bool x, _Bool y) {
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// CHECK-LABEL: define i32 @test_add_overflow_bool_bool_uint
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// CHECK: [[XE:%.+]] = zext i1 %{{.+}} to i32
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// CHECK: [[YE:%.+]] = zext i1 %{{.+}} to i32
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[XE]], i32 [[YE]])
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK: store i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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unsigned r;
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if (__builtin_add_overflow(x, y, &r))
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overflowed();
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return r;
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}
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_Bool test_add_overflow_bool_bool_bool(_Bool x, _Bool y) {
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// CHECK-LABEL: define {{.*}} i1 @test_add_overflow_bool_bool_bool
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// CHECK: [[S:%.+]] = call { i1, i1 } @llvm.uadd.with.overflow.i1(i1 %{{.+}}, i1 %{{.+}})
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i1, i1 } [[S]], 0
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// CHECK-DAG: [[C:%.+]] = extractvalue { i1, i1 } [[S]], 1
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// CHECK: [[QT2:%.+]] = zext i1 [[Q]] to i8
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// CHECK: store i8 [[QT2]], i8*
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// CHECK: br i1 [[C]]
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_Bool r;
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if (__builtin_add_overflow(x, y, &r))
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overflowed();
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return r;
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}
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int test_add_overflow_volatile(int x, int y) {
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// CHECK-LABEL: define i32 @test_add_overflow_volatile
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// CHECK: [[S:%.+]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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// CHECK-DAG: [[Q:%.+]] = extractvalue { i32, i1 } [[S]], 0
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// CHECK-DAG: [[C:%.+]] = extractvalue { i32, i1 } [[S]], 1
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// CHECK: store volatile i32 [[Q]], i32*
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// CHECK: br i1 [[C]]
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volatile int result;
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if (__builtin_add_overflow(x, y, &result))
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overflowed();
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return result;
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}
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unsigned test_uadd_overflow(unsigned x, unsigned y) {
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// CHECK: @test_uadd_overflow
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// CHECK: %{{.+}} = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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unsigned result;
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if (__builtin_uadd_overflow(x, y, &result))
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return UnsignedErrorCode;
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return result;
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}
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unsigned long test_uaddl_overflow(unsigned long x, unsigned long y) {
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// CHECK: @test_uaddl_overflow([[UL:i32|i64]] %x
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// CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.uadd.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}})
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unsigned long result;
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if (__builtin_uaddl_overflow(x, y, &result))
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return UnsignedLongErrorCode;
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return result;
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}
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unsigned long long test_uaddll_overflow(unsigned long long x, unsigned long long y) {
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// CHECK: @test_uaddll_overflow
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// CHECK: %{{.+}} = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %{{.+}}, i64 %{{.+}})
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unsigned long long result;
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if (__builtin_uaddll_overflow(x, y, &result))
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return UnsignedLongLongErrorCode;
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return result;
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}
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unsigned test_usub_overflow(unsigned x, unsigned y) {
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// CHECK: @test_usub_overflow
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// CHECK: %{{.+}} = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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unsigned result;
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if (__builtin_usub_overflow(x, y, &result))
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return UnsignedErrorCode;
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return result;
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}
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unsigned long test_usubl_overflow(unsigned long x, unsigned long y) {
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// CHECK: @test_usubl_overflow([[UL:i32|i64]] %x
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// CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.usub.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}})
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unsigned long result;
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if (__builtin_usubl_overflow(x, y, &result))
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return UnsignedLongErrorCode;
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return result;
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}
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unsigned long long test_usubll_overflow(unsigned long long x, unsigned long long y) {
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// CHECK: @test_usubll_overflow
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// CHECK: %{{.+}} = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %{{.+}}, i64 %{{.+}})
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unsigned long long result;
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if (__builtin_usubll_overflow(x, y, &result))
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return UnsignedLongLongErrorCode;
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return result;
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}
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unsigned test_umul_overflow(unsigned x, unsigned y) {
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// CHECK: @test_umul_overflow
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// CHECK: %{{.+}} = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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unsigned result;
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if (__builtin_umul_overflow(x, y, &result))
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return UnsignedErrorCode;
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return result;
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}
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unsigned long test_umull_overflow(unsigned long x, unsigned long y) {
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// CHECK: @test_umull_overflow([[UL:i32|i64]] %x
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// CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.umul.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}})
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unsigned long result;
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if (__builtin_umull_overflow(x, y, &result))
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return UnsignedLongErrorCode;
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return result;
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}
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unsigned long long test_umulll_overflow(unsigned long long x, unsigned long long y) {
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// CHECK: @test_umulll_overflow
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// CHECK: %{{.+}} = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %{{.+}}, i64 %{{.+}})
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unsigned long long result;
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if (__builtin_umulll_overflow(x, y, &result))
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return UnsignedLongLongErrorCode;
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return result;
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}
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int test_sadd_overflow(int x, int y) {
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// CHECK: @test_sadd_overflow
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// CHECK: %{{.+}} = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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int result;
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if (__builtin_sadd_overflow(x, y, &result))
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return IntErrorCode;
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return result;
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}
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long test_saddl_overflow(long x, long y) {
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// CHECK: @test_saddl_overflow([[UL:i32|i64]] %x
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// CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.sadd.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}})
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long result;
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if (__builtin_saddl_overflow(x, y, &result))
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return LongErrorCode;
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return result;
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}
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long long test_saddll_overflow(long long x, long long y) {
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// CHECK: @test_saddll_overflow
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// CHECK: %{{.+}} = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %{{.+}}, i64 %{{.+}})
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long long result;
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if (__builtin_saddll_overflow(x, y, &result))
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return LongLongErrorCode;
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return result;
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}
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int test_ssub_overflow(int x, int y) {
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// CHECK: @test_ssub_overflow
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// CHECK: %{{.+}} = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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int result;
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if (__builtin_ssub_overflow(x, y, &result))
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return IntErrorCode;
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return result;
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}
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long test_ssubl_overflow(long x, long y) {
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// CHECK: @test_ssubl_overflow([[UL:i32|i64]] %x
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// CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.ssub.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}})
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long result;
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if (__builtin_ssubl_overflow(x, y, &result))
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return LongErrorCode;
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return result;
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}
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long long test_ssubll_overflow(long long x, long long y) {
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// CHECK: @test_ssubll_overflow
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// CHECK: %{{.+}} = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %{{.+}}, i64 %{{.+}})
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long long result;
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if (__builtin_ssubll_overflow(x, y, &result))
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return LongLongErrorCode;
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return result;
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}
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int test_smul_overflow(int x, int y) {
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// CHECK: @test_smul_overflow
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// CHECK: %{{.+}} = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %{{.+}}, i32 %{{.+}})
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int result;
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if (__builtin_smul_overflow(x, y, &result))
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return IntErrorCode;
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return result;
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}
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long test_smull_overflow(long x, long y) {
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// CHECK: @test_smull_overflow([[UL:i32|i64]] %x
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// CHECK: %{{.+}} = call { [[UL]], i1 } @llvm.smul.with.overflow.[[UL]]([[UL]] %{{.+}}, [[UL]] %{{.+}})
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long result;
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if (__builtin_smull_overflow(x, y, &result))
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return LongErrorCode;
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return result;
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}
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long long test_smulll_overflow(long long x, long long y) {
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// CHECK: @test_smulll_overflow
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// CHECK: %{{.+}} = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %{{.+}}, i64 %{{.+}})
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long long result;
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if (__builtin_smulll_overflow(x, y, &result))
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return LongLongErrorCode;
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return result;
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}
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int test_mixed_sign_mull_overflow(int x, unsigned y) {
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// CHECK: @test_mixed_sign_mull_overflow
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// CHECK: [[IsNeg:%.*]] = icmp slt i32 [[Op1:%.*]], 0
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// CHECK-NEXT: [[Signed:%.*]] = sub i32 0, [[Op1]]
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// CHECK-NEXT: [[AbsSigned:%.*]] = select i1 [[IsNeg]], i32 [[Signed]], i32 [[Op1]]
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// CHECK-NEXT: call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[AbsSigned]], i32 %{{.*}})
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// CHECK-NEXT: [[UnsignedOFlow:%.*]] = extractvalue { i32, i1 } %{{.*}}, 1
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// CHECK-NEXT: [[UnsignedResult:%.*]] = extractvalue { i32, i1 } %{{.*}}, 0
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// CHECK-NEXT: [[IsNegZext:%.*]] = zext i1 [[IsNeg]] to i32
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// CHECK-NEXT: [[MaxResult:%.*]] = add i32 2147483647, [[IsNegZext]]
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// CHECK-NEXT: [[SignedOFlow:%.*]] = icmp ugt i32 [[UnsignedResult]], [[MaxResult]]
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// CHECK-NEXT: [[OFlow:%.*]] = or i1 [[UnsignedOFlow]], [[SignedOFlow]]
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// CHECK-NEXT: [[NegativeResult:%.*]] = sub i32 0, [[UnsignedResult]]
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// CHECK-NEXT: [[Result:%.*]] = select i1 [[IsNeg]], i32 [[NegativeResult]], i32 [[UnsignedResult]]
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// CHECK-NEXT: store i32 [[Result]], i32* %{{.*}}, align 4
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// CHECK: br i1 [[OFlow]]
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int result;
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if (__builtin_mul_overflow(x, y, &result))
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return LongErrorCode;
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return result;
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}
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int test_mixed_sign_mull_overflow_unsigned(int x, unsigned y) {
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// CHECK: @test_mixed_sign_mull_overflow_unsigned
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// CHECK: [[IsNeg:%.*]] = icmp slt i32 [[Op1:%.*]], 0
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// CHECK-NEXT: [[Signed:%.*]] = sub i32 0, [[Op1]]
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// CHECK-NEXT: [[AbsSigned:%.*]] = select i1 [[IsNeg]], i32 [[Signed]], i32 [[Op1]]
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// CHECK-NEXT: call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[AbsSigned]], i32 %{{.*}})
|
|
// CHECK-NEXT: [[UnsignedOFlow:%.*]] = extractvalue { i32, i1 } %{{.*}}, 1
|
|
// CHECK-NEXT: [[UnsignedResult:%.*]] = extractvalue { i32, i1 } %{{.*}}, 0
|
|
// CHECK-NEXT: [[NotNull:%.*]] = icmp ne i32 [[UnsignedResult]], 0
|
|
// CHECK-NEXT: [[Underflow:%.*]] = and i1 [[IsNeg]], [[NotNull]]
|
|
// CHECK-NEXT: [[OFlow:%.*]] = or i1 [[UnsignedOFlow]], [[Underflow]]
|
|
// CHECK-NEXT: [[NegatedResult:%.*]] = sub i32 0, [[UnsignedResult]]
|
|
// CHECK-NEXT: [[Result:%.*]] = select i1 [[IsNeg]], i32 [[NegatedResult]], i32 [[UnsignedResult]]
|
|
// CHECK-NEXT: store i32 [[Result]], i32* %{{.*}}, align 4
|
|
// CHECK: br i1 [[OFlow]]
|
|
|
|
unsigned result;
|
|
if (__builtin_mul_overflow(x, y, &result))
|
|
return LongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
int test_mixed_sign_mull_overflow_swapped(int x, unsigned y) {
|
|
// CHECK: @test_mixed_sign_mull_overflow_swapped
|
|
// CHECK: call { i32, i1 } @llvm.umul.with.overflow.i32
|
|
// CHECK: add i32 2147483647
|
|
int result;
|
|
if (__builtin_mul_overflow(y, x, &result))
|
|
return LongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
long long test_mixed_sign_mulll_overflow(long long x, unsigned long long y) {
|
|
// CHECK: @test_mixed_sign_mulll_overflow
|
|
// CHECK: call { i64, i1 } @llvm.umul.with.overflow.i64
|
|
// CHECK: add i64 92233720368547
|
|
long long result;
|
|
if (__builtin_mul_overflow(x, y, &result))
|
|
return LongLongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
long long test_mixed_sign_mulll_overflow_swapped(long long x, unsigned long long y) {
|
|
// CHECK: @test_mixed_sign_mulll_overflow_swapped
|
|
// CHECK: call { i64, i1 } @llvm.umul.with.overflow.i64
|
|
// CHECK: add i64 92233720368547
|
|
long long result;
|
|
if (__builtin_mul_overflow(y, x, &result))
|
|
return LongLongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
long long test_mixed_sign_mulll_overflow_trunc_signed(long long x, unsigned long long y) {
|
|
// CHECK: @test_mixed_sign_mulll_overflow_trunc_signed
|
|
// CHECK: call { i64, i1 } @llvm.umul.with.overflow.i64
|
|
// CHECK: add i64 2147483647
|
|
// CHECK: trunc
|
|
// CHECK: store
|
|
int result;
|
|
if (__builtin_mul_overflow(y, x, &result))
|
|
return LongLongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
long long test_mixed_sign_mulll_overflow_trunc_unsigned(long long x, unsigned long long y) {
|
|
// CHECK: @test_mixed_sign_mulll_overflow_trunc_unsigned
|
|
// CHECK: call { i64, i1 } @llvm.umul.with.overflow.i64
|
|
// CHECK: [[NON_ZERO:%.*]] = icmp ne i64 [[UNSIGNED_RESULT:%.*]], 0
|
|
// CHECK-NEXT: [[UNDERFLOW:%.*]] = and i1 {{.*}}, [[NON_ZERO]]
|
|
// CHECK-NEXT: [[OVERFLOW_PRE_TRUNC:%.*]] = or i1 {{.*}}, [[UNDERFLOW]]
|
|
// CHECK-NEXT: [[TRUNC_OVERFLOW:%.*]] = icmp ugt i64 [[UNSIGNED_RESULT]], 4294967295
|
|
// CHECK-NEXT: [[OVERFLOW:%.*]] = or i1 [[OVERFLOW_PRE_TRUNC]], [[TRUNC_OVERFLOW]]
|
|
// CHECK-NEXT: [[NEGATED:%.*]] = sub i64 0, [[UNSIGNED_RESULT]]
|
|
// CHECK-NEXT: [[RESULT:%.*]] = select i1 {{.*}}, i64 [[NEGATED]], i64 [[UNSIGNED_RESULT]]
|
|
// CHECK-NEXT: trunc i64 [[RESULT]] to i32
|
|
// CHECK-NEXT: store
|
|
unsigned result;
|
|
if (__builtin_mul_overflow(y, x, &result))
|
|
return LongLongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
long long test_mixed_sign_mul_overflow_extend_signed(int x, unsigned y) {
|
|
// CHECK: @test_mixed_sign_mul_overflow_extend_signed
|
|
// CHECK: call { i64, i1 } @llvm.smul.with.overflow.i64
|
|
long long result;
|
|
if (__builtin_mul_overflow(y, x, &result))
|
|
return LongLongErrorCode;
|
|
return result;
|
|
}
|
|
|
|
long long test_mixed_sign_mul_overflow_extend_unsigned(int x, unsigned y) {
|
|
// CHECK: @test_mixed_sign_mul_overflow_extend_unsigned
|
|
// CHECK: call { i65, i1 } @llvm.smul.with.overflow.i65
|
|
unsigned long long result;
|
|
if (__builtin_mul_overflow(y, x, &result))
|
|
return LongLongErrorCode;
|
|
return result;
|
|
}
|