11 Commits

Author SHA1 Message Date
Cyrill Leutwiler
bd32aaa8c9 [RISCV] Support rv{32, 64}e in the compiler builtins (#88252)
Register spills (save/restore) in RISC-V embedded work differently
because there are less registers and different stack alignment.

[GCC equivalent
](https://github.com/gcc-mirror/gcc/blob/master/libgcc/config/riscv/save-restore.S#L298C16-L336)

Follow up from #76777.

---------

Signed-off-by: xermicus <cyrill@parity.io>
2024-04-11 13:11:51 +08:00
Kito Cheng
2b5ea51a41 [compiler-rt][RISCV] Fix __fe_getround and __fe_raise_inexact for Zfinx
Zfinx extension also provide floating point environment like F extension, so
enable that on `__fe_getround` and `__fe_raise_inexact` too.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D154570
2023-07-07 14:24:50 +08:00
luxufan
ace6e172bd [RISCV] Support fe_getround and fe_raise_inexact in builtins
Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D128240
2022-08-08 09:58:27 +08:00
Jessica Clarke
b8d83e83be [RISCV][compiler-rt] Fix an incorrect comment for RV64 __riscv_restore_12
This was presumably copied from the RV32 implementation and not updated
like the rest.
2021-09-15 15:25:59 +01:00
Jessica Clarke
bbca392a7f [RISCV][compiler-rt] Move RV64 __riscv_restore_1/0 directives next to labels
This looks like it was copied from the RV32 version and not properly
updated. This has no functional effect but is not good style.
2021-09-15 14:42:22 +01:00
Jessica Clarke
3c885190af [RISCV][compiler-rt] Add missing __riscv_save_1/0 labels for RV64
These got missed in D91717.
2021-09-15 14:42:16 +01:00
Edward Jones
b136a74efc [RISCV][compiler-rt] Add support for save-restore
This adds the compiler-rt entry points required by the
-msave-restore option.

Differential Revision: https://reviews.llvm.org/D91717
2021-03-15 15:51:47 +00:00
Luís Marques
58f6b16c49 [compiler-rt][builtins][RISCV] Always include __mul[sd]i3 builtin definitions
The RISC-V implementations of the `__mulsi3`, `__muldi3` builtins were
conditionally compiling the actual function definitions depending on whether
the M extension was present or not. This caused Compiler-RT testing failures
for RISC-V targets with the M extension, as when these sources were included
the `librt_has_mul*i3` features were still being defined. These `librt_has_*`
definitions are used to conditionally run the respective tests. Since the
actual functions were not being compiled-in, the generic test for `__muldi3`
would fail. This patch makes these implementations follow the normal
Compiler-RT convention of always including the definition, and conditionally
running the respective tests by using the lit conditional
`REQUIRES: librt_has_*`.

Since the `mulsi3_test.c` wasn't actually RISC-V-specific, this patch also
moves it out of the `riscv` directory. It now only depends on
`librt_has_mulsi3` to run.

Differential Revision: https://reviews.llvm.org/D86457
2020-10-21 09:49:03 +01:00
kamlesh kumar
e31ccee1b0 [RISCV-V] Provide muldi3 builtin assembly implementation
Provides an assembly implementation of muldi3 for RISC-V, to solve bug 43388.
Since the implementation is the same as for mulsi3, that code was moved to
`riscv/int_mul_impl.inc` and is now reused by both `mulsi3.S` and `muldi3.S`.

Differential Revision: https://reviews.llvm.org/D80465
2020-06-02 21:04:55 +01:00
Chandler Carruth
57b08b0944 Update more file headers across all of the LLVM projects in the monorepo
to reflect the new license. These used slightly different spellings that
defeated my regular expressions.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351648
2019-01-19 10:56:40 +00:00
Shiva Chen
77f19a384c [PATCH] [compiler-rt, RISCV] Support builtins for RISC-V
Summary:
Support builtins for RISC-V, RV32 and RV64.

Reviewers: asb, apazos, mgrang

Differential Revision: https://reviews.llvm.org/D42958

llvm-svn: 326420
2018-03-01 07:47:27 +00:00