fix 'the the '; NFC
llvm-svn: 254928
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@@ -286,7 +286,7 @@ namespace llvm {
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/// Returns true if the result or effects of the given instructions \p I
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/// Returns true if the result or effects of the given instructions \p I
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/// depend on or influence global memory.
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/// depend on or influence global memory.
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/// Memory dependence arises for example if the the instruction reads from
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/// Memory dependence arises for example if the instruction reads from
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/// memory or may produce effects or undefined behaviour. Memory dependent
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/// memory or may produce effects or undefined behaviour. Memory dependent
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/// instructions generally cannot be reorderd with respect to other memory
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/// instructions generally cannot be reorderd with respect to other memory
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/// dependent instructions or moved into non-dominated basic blocks.
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/// dependent instructions or moved into non-dominated basic blocks.
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@@ -289,7 +289,7 @@ void RuntimePointerChecking::groupChecks(
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// don't process them twice.
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// don't process them twice.
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SmallSet<unsigned, 2> Seen;
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SmallSet<unsigned, 2> Seen;
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// Go through all equivalence classes, get the the "pointer check groups"
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// Go through all equivalence classes, get the "pointer check groups"
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// and add them to the overall solution. We use the order in which accesses
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// and add them to the overall solution. We use the order in which accesses
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// appear in 'Pointers' to enforce determinism.
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// appear in 'Pointers' to enforce determinism.
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for (unsigned I = 0; I < Pointers.size(); ++I) {
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for (unsigned I = 0; I < Pointers.size(); ++I) {
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@@ -1592,7 +1592,7 @@ int HexagonAsmParser::processInstruction(MCInst &Inst,
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// not use the other opcode as it is a legacy artifact of TD files.
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// not use the other opcode as it is a legacy artifact of TD files.
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int64_t Value;
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int64_t Value;
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if (MO.getExpr()->evaluateAsAbsolute(Value)) {
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if (MO.getExpr()->evaluateAsAbsolute(Value)) {
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// if the the operand can fit within a 7:2 field
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// if the operand can fit within a 7:2 field
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if (Value < (1 << 8) && Value >= -(1 << 8)) {
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if (Value < (1 << 8) && Value >= -(1 << 8)) {
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SMLoc myLoc = Operands[2]->getStartLoc();
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SMLoc myLoc = Operands[2]->getStartLoc();
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// # is left in startLoc in the case of ##
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// # is left in startLoc in the case of ##
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@@ -1475,7 +1475,7 @@ bool HexagonInstrInfo::isComplex(const MachineInstr *MI) const {
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}
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}
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// Return true if the the instruction is a compund branch instruction.
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// Return true if the instruction is a compund branch instruction.
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bool HexagonInstrInfo::isCompoundBranchInstr(const MachineInstr *MI) const {
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bool HexagonInstrInfo::isCompoundBranchInstr(const MachineInstr *MI) const {
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return (getType(MI) == HexagonII::TypeCOMPOUND && MI->isBranch());
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return (getType(MI) == HexagonII::TypeCOMPOUND && MI->isBranch());
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}
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}
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@@ -2826,7 +2826,7 @@ void DwarfLinker::patchRangesForUnit(const CompileUnit &Unit,
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uint64_t OrigLowPc = OrigUnitDie->getAttributeValueAsAddress(
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uint64_t OrigLowPc = OrigUnitDie->getAttributeValueAsAddress(
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&OrigUnit, dwarf::DW_AT_low_pc, -1ULL);
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&OrigUnit, dwarf::DW_AT_low_pc, -1ULL);
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// Ranges addresses are based on the unit's low_pc. Compute the
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// Ranges addresses are based on the unit's low_pc. Compute the
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// offset we need to apply to adapt to the the new unit's low_pc.
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// offset we need to apply to adapt to the new unit's low_pc.
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int64_t UnitPcOffset = 0;
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int64_t UnitPcOffset = 0;
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if (OrigLowPc != -1ULL)
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if (OrigLowPc != -1ULL)
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UnitPcOffset = int64_t(OrigLowPc) - Unit.getLowPc();
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UnitPcOffset = int64_t(OrigLowPc) - Unit.getLowPc();
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@@ -100,7 +100,7 @@ static cl::opt<bool> AsmVerbose("asm-verbose",
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static cl::opt<bool>
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static cl::opt<bool>
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CompileTwice("compile-twice", cl::Hidden,
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CompileTwice("compile-twice", cl::Hidden,
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cl::desc("Run everything twice, re-using the same pass "
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cl::desc("Run everything twice, re-using the same pass "
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"manager and verify the the result is the same."),
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"manager and verify the result is the same."),
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cl::init(false));
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cl::init(false));
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static int compileModule(char **, LLVMContext &);
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static int compileModule(char **, LLVMContext &);
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