ARM Cost model: Use the size of vector registers and widest vectorizable instruction to determine the max vectorization factor.
llvm-svn: 172010
This commit is contained in:
@@ -84,6 +84,7 @@ public:
|
||||
|
||||
virtual unsigned getNumberOfRegisters(bool Vector) const;
|
||||
virtual unsigned getMaximumUnrollFactor() const;
|
||||
virtual unsigned getRegisterBitWidth(bool Vector) const;
|
||||
virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
|
||||
virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
|
||||
int Index, Type *SubTp) const;
|
||||
@@ -183,6 +184,10 @@ unsigned BasicTTI::getNumberOfRegisters(bool Vector) const {
|
||||
return 1;
|
||||
}
|
||||
|
||||
unsigned BasicTTI::getRegisterBitWidth(bool Vector) const {
|
||||
return 32;
|
||||
}
|
||||
|
||||
unsigned BasicTTI::getMaximumUnrollFactor() const {
|
||||
return 1;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user