GlobalISel: implement low-level type with just size & vector lanes.
This should be all the low-level instruction selection needs to determine how to implement an operation, with the remaining context taken from the opcode (e.g. G_ADD vs G_FADD) or other flags not based on type (e.g. fast-math). llvm-svn: 276158
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@@ -656,7 +656,7 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
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debugLoc(std::move(dl))
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#ifdef LLVM_BUILD_GLOBAL_ISEL
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,
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Ty(nullptr)
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Ty(LLT{})
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#endif
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{
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assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
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@@ -680,7 +680,7 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
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MemRefs(MI.MemRefs), debugLoc(MI.getDebugLoc())
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#ifdef LLVM_BUILD_GLOBAL_ISEL
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,
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Ty(nullptr)
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Ty(LLT{})
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#endif
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{
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assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
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@@ -710,18 +710,18 @@ MachineRegisterInfo *MachineInstr::getRegInfo() {
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// The proper implementation is WIP and is tracked here:
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// PR26576.
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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void MachineInstr::setType(Type *Ty) {}
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void MachineInstr::setType(LLT Ty) {}
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Type *MachineInstr::getType() const { return nullptr; }
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LLT MachineInstr::getType() const { return LLT{}; }
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#else
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void MachineInstr::setType(Type *Ty) {
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assert((!Ty || isPreISelGenericOpcode(getOpcode())) &&
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void MachineInstr::setType(LLT Ty) {
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assert((!Ty.isValid() || isPreISelGenericOpcode(getOpcode())) &&
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"Non generic instructions are not supposed to be typed");
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this->Ty = Ty;
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}
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Type *MachineInstr::getType() const { return Ty; }
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LLT MachineInstr::getType() const { return Ty; }
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#endif // LLVM_BUILD_GLOBAL_ISEL
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/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
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@@ -1724,9 +1724,9 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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else
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OS << "UNKNOWN";
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if (getType()) {
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if (getType().isValid()) {
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OS << ' ';
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getType()->print(OS, /*IsForDebug*/ false, /*NoDetails*/ true);
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getType().print(OS);
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OS << ' ';
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}
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