[SLP] Preserve IR flags when vectorizing horizontal reductions.
Summary: The SLP vectorizer should propagate IR-level optimization hints/flags (nsw, nuw, exact, fast-math) when converting scalar horizontal reductions instructions into vectors, just like for other vectorized instructions. It doe not include IR propagation for extra arguments, we need to handle original scalar operations for extra args to propagate correct flags. Reviewers: mkuper, mzolotukhin, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30418 llvm-svn: 296614
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@@ -4459,11 +4459,12 @@ public:
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// Emit a reduction.
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Value *ReducedSubTree =
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emitReduction(VectorizedRoot, Builder, ReduxWidth);
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emitReduction(VectorizedRoot, Builder, ReduxWidth, ReductionOps);
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if (VectorizedTree) {
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Builder.SetCurrentDebugLocation(Loc);
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VectorizedTree = Builder.CreateBinOp(ReductionOpcode, VectorizedTree,
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ReducedSubTree, "bin.rdx");
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propagateIRFlags(VectorizedTree, ReductionOps);
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} else
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VectorizedTree = ReducedSubTree;
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i += ReduxWidth;
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@@ -4477,6 +4478,7 @@ public:
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Builder.SetCurrentDebugLocation(I->getDebugLoc());
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VectorizedTree =
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Builder.CreateBinOp(ReductionOpcode, VectorizedTree, I);
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propagateIRFlags(VectorizedTree, ReductionOps);
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}
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for (auto &Pair : ExternallyUsedValues) {
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assert(!Pair.second.empty() &&
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@@ -4527,7 +4529,7 @@ private:
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/// \brief Emit a horizontal reduction of the vectorized value.
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Value *emitReduction(Value *VectorizedValue, IRBuilder<> &Builder,
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unsigned ReduxWidth) {
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unsigned ReduxWidth, ArrayRef<Value *> RedOps) {
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assert(VectorizedValue && "Need to have a vectorized tree node");
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assert(isPowerOf2_32(ReduxWidth) &&
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"We only handle power-of-two reductions for now");
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@@ -4554,6 +4556,7 @@ private:
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TmpVec, UndefValue::get(TmpVec->getType()), UpperHalf, "rdx.shuf");
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TmpVec = Builder.CreateBinOp(ReductionOpcode, TmpVec, Shuf, "bin.rdx");
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}
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propagateIRFlags(TmpVec, RedOps);
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}
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// The result is in the first element of the vector.
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