Revert "[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support."
This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly. llvm-svn: 265554
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@@ -384,41 +384,12 @@ public:
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}
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};
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HexagonPrettyPrinter HexagonPrettyPrinterInst;
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class AMDGCNPrettyPrinter : public PrettyPrinter {
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public:
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void printInst(MCInstPrinter &IP,
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const MCInst *MI,
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ArrayRef<uint8_t> Bytes,
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uint64_t Address,
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raw_ostream &OS,
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StringRef Annot,
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MCSubtargetInfo const &STI) override {
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SmallString<40> InstStr;
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raw_svector_ostream IS(InstStr);
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IP.printInst(MI, IS, "", STI);
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OS << left_justify(IS.str(), 60) << format("// %012X: ", Address);
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typedef support::ulittle32_t U32;
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for (auto D : makeArrayRef(reinterpret_cast<const U32*>(Bytes.data()),
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Bytes.size() / sizeof(U32)))
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OS << format("%08X ", D);
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if (!Annot.empty())
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OS << "// " << Annot;
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}
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};
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AMDGCNPrettyPrinter AMDGCNPrettyPrinterInst;
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PrettyPrinter &selectPrettyPrinter(Triple const &Triple) {
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switch(Triple.getArch()) {
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default:
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return PrettyPrinterInst;
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case Triple::hexagon:
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return HexagonPrettyPrinterInst;
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case Triple::amdgcn:
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return AMDGCNPrettyPrinterInst;
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}
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}
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}
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@@ -1075,18 +1046,6 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
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if (Start >= End)
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continue;
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if (Obj->isELF() && Obj->getArch() == Triple::amdgcn) {
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// make size 4 bytes folded
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End = Start + ((End - Start) & ~0x3ull);
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Start += 256; // add sizeof(amd_kernel_code_t)
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// cut trailing zeroes - up to 256 bytes (align)
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const uint64_t EndAlign = 256;
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const auto Limit = End - (std::min)(EndAlign, End - Start);
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while (End > Limit &&
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*reinterpret_cast<const support::ulittle32_t*>(&Bytes[End - 4]) == 0)
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End -= 4;
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}
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outs() << '\n' << Symbols[si].second << ":\n";
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#ifndef NDEBUG
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